1. Field of Use
The present invention relates to data processing systems and more particularly to microprogrammed data processing systems.
2. Prior Art
In general, in order to reduce the storage requirements of a microprogrammed control element, some systems have employed two control stores. Such a system is disclosed in U.S. Pat. No. 4,001,788 which is assigned to the assignee of the present invention.
While such arrangements have considerable advantages, it is noted that the overall performance of such microprogrammed data processing units are less due to the time required to be expended in decoding a series of microinstructions for execution of a program instruction.
Another system includes a microprogrammed control unit which includes a control store and a hardware sequencer network for generating additional microoperation commands at higher speeds in response to address or control signals from such store together with condition signals. This system is disclosed in U.S. Pat. No. 3,872,447. An enabling signal or a microinstruction from a control store is used to effect the operation of the hardware sequencer network.
While the above arrangement increases system speed, it essentially operates to extend the number of microcommands which may be obtained from a microinstruction without requiring an extension of the length of the microinstruction. However, such additional microcommands are arranged to be dependent upon the addresses of the microinstruction and condition signals.
Hence, execution of program instructions primarily proceeds under microprogram control whereby the overall performance of the system is still substantially less than hardwired data processing system.
The performance of a microprogrammed control unit becomes even more important in the case of high performance pipe-lined processing systems. Such systems typically perform instructions which are stored in a high speed low capacity buffer or cache unit in such a manner that more than one instruction is actually being processed at any one instant of time. Since instructions can be fetched faster from memory, this results in such increased performance.
To retain the efficiency of such systems, it has been the practice to utilize non microprogrammed control units. The reason is that even those microprogrammed control units include apparatus which increases operating speed, such units are not well suited for efficiently controlling a pipeline data processing unit. However, it has been found that such non microprogrammed control units are more complex and require hardware circuit changes for changes in instructions.
Accordingly, it is a primary object of the present invention to provide a high performance microprogrammed control unit.
It is a further object of the present invention to provide a microprogrammed control unit for use in a pipeline data processing unit.